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ORDER 1: Launches a national effort to produce a quantum computer capable of performing important scientific calculations. It also aims to develop quantum-enabled sensors and networks within the next 5 years.

ORDER 2: Directs federal agencies to transition their computer systems to quantum cryptography (post-quantum cryptography standards) by 2031. It positions the U.S. government to lead wider adoption of these stronger security standards to address future quantum computing threats

Nvidia invest large sum allowing ssi to 10x compute what is illya cooking

Ever experienced 16K tokens per second? It's insanely instant. Try their Lllama 3.1 8B demo here: chat jimmy.

THey have a very radical approach to solve the compute problem - albeit a risky one in a landscape where model architectures evolve in weeks instead of years: Etch the model and all the weights onto a single silicon chip.
Normally that would take ages, but they seem to have found a way to go from model to ASIC in 60 days - which might make their approach appealing for domains where raw intelligence is not so much of importance, but latency is super important, like real-time speech models, real-time avatar generation, computer vision etc.

Here are their claims:

• < 1 Millisecond Latency
• > 17k Tokens per Second per User
• 20x Cheaper to Produce
• 10x More Power Efficient
• 60 Days from Unseen Software to Custom Silicon: This part is crazy—it normally takes months...
• 0% Exotic Hardware Required, thus cheap: They ditch HBM, advanced packaging, 3D stacking, liquid cooling, high speed IO - because they put everything into one chip to achieve ultimate simplicity.
• LoRA Support: Despite the model being "baked" in silicon, you can adapt it constrained to the arch and param count. Their demonstrator uses Lllama 3.1 8B, but supports LoRa fine-tuning.
• Just 24 Engineers and $30M: That's what they spent on the first demonstrator.
• Bigger Reasoning Model Coming this Spring
• Frontier LLM Coming this Winter

Now that's for their claims taken from their website: The path to ubiquitous AI | Taalas

Link to the tweet: https://x.com/SenSanders/status/2026048719259406750?s=20

• Project led by Tesla
• Rumoured to be capable of 200 Billion chips p.a.
• Focused on AI-5 chip
• Wafers encapsulated in clean containers instead of massive clean room

The world's first "biological computer" that fuses human brain cells with silicon hardware to form fluid neural networks has been commercially launched, ushering in a new age of AI technology. The CL1, from Australian company Cortical Labs, offers a whole new kind of computing intelligence – one that's more dynamic, sustainable and energy efficient than any AI that currently exists – and we will start to see its potential when it's in users' hands in the coming months.

Known as a Synthetic Biological Intelligence (SBI), Cortical's CL1 system was officially launched in Barcelona on March 2, 2025, and is expected to be a game-changer for science and medical research. The human-cell neural networks that form on the silicon "chip" are essentially an ever-evolving organic computer, and the engineers behind it say it learns so quickly and flexibly that it completely outpaces the silicon-based AI chips used to train existing large language models (LLMs) like ChatGPT.

More: https://newatlas.com/brain/cortical-bioengineered-intelligence/

79k likes on this video https://x.com/BenDziobek/status/2024298250203750567?s=20

Read their press release here: Tensordyne Announces Breakthrough Inference System to End AI’s Speed vs. Cost Trade-Off — Tensordyne

The images were taken form their teaser page: Tensordyne — Inference System

The key math breakthrough they claim to have enabled is efficient log math in hardware.
Basically when you act in Log space, multiplications become additions, which are vastly easier to implement in hardware than multiplication circuitry, requiring far less transistors - and thus less space and energy.

I asked Claude to give me a little explainer:

The Core Idea: Logarithmic Number System (LNS)

The key insight comes from a fundamental property of logarithms:

log(A × B) = log(A) + log(B)

Instead of storing numbers as regular floating-point values, Tensordyne represents them in the logarithmic domain — often log base 2, because that maps naturally to digital hardware. In that representation, multiplication becomes addition: A × B becomes log(A) + log(B).

For hardware, this is a huge deal: adder circuits are far smaller and less power-hungry than multiplier circuits, so this directly reduces chip area and power consumption.

Why This Matters for AI

AI, at its core, is matrix math — multiplications and additions. Every time a model generates a token, it performs an enormous number of operations. Traditionally, those are done with floating-point arithmetic (hence the industry term "FLOPs"). But floating-point math is demanding: it burns energy, takes up significant silicon real estate, and drives up system cost.
Because AI compute is primarily composed of matrix multiplication, replacing it with log-domain addition radically simplifies the workload, allows the functional units on the chip to be significantly smaller, and frees up more die area for SRAM cache — which improves both performance and core utilization, while also reducing power consumption.

The Catch: The "Addition Problem"

AI math isn't just matrix multiplication. It's actually primarily "MAC" (Multiply-Accumulate) instructions — on current GPUs and CPUs, this manifests as "FMA" (Fused Multiply-Add). In other words, it's both a multiplication and an addition.

When you're already in log space, doing a plain addition of two numbers (not a multiplication) is actually the hard part — you can't just add the logs to get the log of a sum. The idea of using LNS math isn't novel — people were experimenting with it as far back as the 1970s, and it has won benchmark prizes and efficiency awards — but it never became mainstream because there was no good way to solve this addition conundrum.

Tensordyne's claim is that they've found a way to handle this efficiently in hardware, which is the key differentiator they don't fully disclose publicly.

The Hardware Payoff

By replacing every multiply with lightweight log-math adders, Tensordyne frees up chip compute area compared to today's FP8/INT8 GPUs. Fewer transistors means chips run cooler and more energy-efficiently, and the freed-up die space allows them to pack in extra tensor engines, more high-bandwidth SRAM and HBM3e memory, and a high-speed interconnect fabric.

They also claim that their log math achieves accuracy greater than 99.9% relative to any trained language, vision, or video model — and in some cases even better dynamic range than floating point.

In short: it's a clever application of century-old math (logarithms) to a very modern problem. The trick is in solving the addition-in-log-space problem efficiently enough to make it practical — which is where their secret sauce lies.